• Quick Convergence Mobility Control Schemes in Wireless Sensor Networks, Xiao Chen, Zhen Jiang and Jie Wu
• A Distributed Algorithmic Framework for Coverage Problems in Wireless Sensor Networks, Akshaye Dhawan and Sushil K. Prasad
• Self-organized Forensic Support in MANETs, Xiwei Zhao, Vinayak Ganapathy, Niki Pissinou and Kia Makki
• The Space Complexity of the Leader Election in Anonymous Networks, Ei Ando, Hirotaka Ono, Kunihiko Sadakane and Masafumi Yamashita

• Self-Stabilizing Wavelets and rho-Hops Coordination, Christian Boulinier and Franck Petit
• Analytic Performance Models for Bounded Queueing Systems, Praveen Krishnamurthy and Roger D. Chamberlain
• On the Construction of Paired Many-to-Many Disjoint Path Covers in Hypercube-Like Interconnection Networks, Jung-Heum Park and Hee-Chul Kim and Hyeong-Seok Lim
• BSP2OMP: A Compiler for translating BSP programs to OpenMP, Ami Marowka

• Why Shared Memory Matters to VLSI Design: The BSR Is as Powerful as Reconfiguration, Stefan D. Bruda and Yuanqiao Zhang
• Maximal Strips Data Structure to Represent Free Space on Partially Reconfigurable FPGAs, Mostafa Elbidweihy and Jerry L. Trahan
• Design and Implementation of a Tool for Modeling and Programming Deadlock Free Meta-pipeline Applications, Shinichi Yamagiwa and Leonel Sousa
• A Scalable Configurable Architecture for the Massively Parallel GCA Model, Johannes Jendrsczok, Patrick Ediger and Rolf Hoffmann
• SIFT Implementation and Optimization for Multi-Core Systems, Qi Zhang, Yurong Chen, Yimin Zhang and Yinlong Xu

• On the Performance and Cost of Some PRAM Models on CMP Hardware, Martti Forsell
• Fault Tolerant Scheduling of Precedence Task Graphs on Heterogeneous Platforms, Anne Benoit, Mourad Hakem and Yves Robert
• Offline and Online Scheduling of Concurrent Bags-of-tasks on Heterogeneous Platforms, Anne Benoit, Loris Marchal, Jean-Francois Pineau, Yves Robert and Frederic Vivien
• Manageable Peer-to-Peer Architecture for Video-on-Demand, Xuguang Lan, Nanning Zheng, Jianru Xue, Xiaoguang Wu, Bin Gao, Weike Chen
• Component Labeling for k-Concave Binary Image Using an FPGA, Yasuaki Ito and Koji Nakano

All presentation will be of 20 minutes duration, which includes a 15-minute presentation and 5-minute question and discussion time.