19th Workshop on Advances in Parallel and Distributed Computational Models
APDCM2017 May 29, 2017, to be held in conjunction with
31st IEEE International Parallel and Distributed Processing Symposium
IPDPS
May 29 – June 2, 2017,
Buena Vista Palace Hotel,
Orlando, Florida USA
Program
Tentative program is here
Call for Papers
The past twenty years have seen a flurry of activity in the area of parallel and distributed computing. In recent years, novel parallel and distributed computational models have been proposed in the literature, reflecting advances in new computational devices and environments such as optical interconnects, programmable logic arrays, networks of workstations, radio communications, mobile computing, DNA computing, quantum computing, sensor networks etc. It is very encouraging to note that the advent of these new models has lead to significant advances in the resolution of various difficult problems of practical interest.
The main goal of this workshop is to provide a timely forum for the exchange and dissemination of new ideas, techniques and research in the field of the parallel and distributed computational models. The workshop is meant to bring together researchers and practitioners interested in all aspects of parallel and distributed computing taken in an inclusive, rather than exclusive, sense. We are convinced that the workshop atmosphere will be conducive to open and mutually beneficial exchanges of ideas between the participants.
Topics
Topics of interest include, but are not limited to
Models of Parallel and Distributed Computing
Radio communication models, Mobile computing models, Sensor network models, Hardware-specific models, FPGA models, Systolic arrays and cellular automata, peer-to-peer models, Biologically-based computing models, Quantum models, Reconfigurable models, Optical models, CUDA, OpenCL, GPU computing models, BSP and LogP models
Algorithms and Applications
Geometric and graph algorithms, Combinatorial algorithms, Randomized and approximation techniques, Numerical algorithms, Network algorithms, Localized algorithms, Distributed algorithms, Image processing, High-performance computing, GPU applications, MapReduce
Practical Aspects
Architectural and implementation issues, Performance analysis and simulation, MPI, Multi-core processors, Programmable logic arrays, GPGPU, Design of network protocols, Embedded systems, Cloud computing, Cluster Computing, Development tools, Fault tolerance, Security Issues
Submission Guidelines
Prospective authors are encouraged to submit an electronic version of original, unpublished manuscripts, not to exceed 10 pages using Manuscript Templates for Conference Proceedings. We also welcome comprehensive survey papers on timely topics. Abstracts must be registered through EasyChair by February 2, 2017. After the abstract registration, the PDF of the paper must be submitted by February 7, 2017. You can update abstract and the PDF anytime before the due dates.
Important Dates
All daetes are in UTC and submission must be done by 23:59PM in UTC.
Abstract registration due: January 15, 2017 January 26, 2017 February 2, 2017 (extended)
Full paper submission due: January 20, 2017 January 31, 2017 February 7, 2017 (extended)
Notification: February 20, 2017 February 28, 2017
Final manuscript due: March 15, 2017
Keynote talk
Title: Advances of Smart Computing in Datacenter Networks
Speaker: Professor Hong Shen (University of Adelaide)
Abstract: As the result of technology advancement of cloud computing and high-speed networking, smart computing across geographically dispersed data centers is evolving to become a major paradigm for future computing. A smart computing system is composed of a dedicated datacenter network (DCN) of ultra-high bandwidth that interconnects multiple data centers, each containing a massive number of servers, to provide high-performance distributed computing on a large scale, and an edge network (EN) that connects the DCN to edge servers through the Internet to support ubiquitous on-demand access from various sources. In this talk I will first introduce the architecture and new features of smart computing systems. I will then discuss the challenges, current research status in response to these features, and our relevant work at different levels from architectures and data transmission to resource allocation and security. Finally I will conclude the talk by presenting some open problems for future research.
Speaker biography: Hong Shen is a tenured Professor (Chair) of Computer Science in the University of Adelaide, Australia, and a specially-appointed Professor in Sun Yat-sen University, China. He received the B.Eng. degree from Beijing University of Science and Technology, M.Eng. degree from University of Science and Technology of China, Ph.Lic. and Ph.D. degrees from Abo Akademi University, Finland, all in Computer Science. He was Professor and Chair of the Computer Networks Laboratory in Japan Advanced Institute of Science and Technology (JAIST) during 2001-2006, and Professor of Compute Science at Griffith University, Australia, where he taught 9 years since 1992. With main research interests in parallel and distributed computing, algorithms, data mining, privacy preserving computing and high performance networks, he has led numerous research centers and projects in different countries. He has published a large number of papers including over 100 papers in international journals such as a variety of IEEE and ACM transactions. Prof. Shen received many honors and awards, served on different roles in professional societies, journal editorial boards and conference organizations.
Organization
Workshop co-Chairs
Oscar H. Ibarra, University of California, Santa Barbara
Koji Nakano, Hiroshima University
Program co-Chairs
Akihiro Fujiwara, Kyushu Institute of Technology
Susumu Matsumae, Saga University
Program Committee
Jacir Bordim, University of Brasília
Jens Breitbart, TUM
Amlan Chatterjee, California State University, Dominguez Hills
Gianlorenzo D'Angelo, Gran Sasso Science Institute
Ajoy K. Datta, University of Nevada, Las Vegas
Stéphane Devismes, VERIMAG UMR 5104
Swan Dubois, UPMC Sorbonne Universités & Inria
Martti Forsell, VTT
Satoshi Fujita, Hiroshima University
Liang Hong Tennessee State University
Shuichi Ichikawa, Toyohashi University of Technology
Fumihiko Ino, Osaka University
Yasushi Inoguchi JAIST
Yasuaki Ito, Hiroshima University
Chuzo Iwamoto, Hiroshima University
Xiaohong Jiang, Future University Hakodate
Hirotsugu Kakugawa, Osaka University
Yoshiaki Katayama, Nagoya Institute of Technology
Michihiro Koibuchi, National Institute of Informatics
Anissa Lamani, Kyushu University
Guoqiang Li, Shanghai Jiao Tong University
Yamin Li, Hosei University
Ami Marowka Bar-Ilan, University
Eiji Miyano, Kyushu Institute of Technology
Hirotaka Ono, Kyushu University
Sudeep Pasricha, Colorado State University
Franck Petit, LiP6 CNRS-INRIA UPMC Sorbonne Universités
Lavanya Ramapantulu, National University of Singapore
Nicola Santoro, Carleton University
Pradip Srimani, Clemson University
Wei Sun, Data61/CSIRO
Yasuhiko Takenaga, The University of Electro-Communications
Jerry Trahan, Louisiana State University, Baton Rouge
Tatsuhiro Tsuchiya, Osaka University
Jiangtao Yin, CISCO
Xin Zhou, Jiangxi Science and Technology Normal University
Inquiry
Any inquiry concerning the workshop may be sent to apdcm17@cs.hiroshima-u.ac.jp.
Links
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IJNC (International Journal of Networking and Computing)
CANDAR (International Symposium on Computing and Networking)
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